Integrated circuits (“ICs”) are commonly used in the communication of data. For transmitters transmitting and receivers receiving such data, phase interpolators may be used to adjust frequency of a reference clock signal to accommodate different data or line rates, which may be changed asynchronously. Unfortunately, this means that controlling operation of transmitter/receiver buffer latency is not available by such phase interpolators when they are in use for frequency adjustment. Hence, it is desirable and useful to provide latency control in a buffer without adding another phase interpolator to a transmitter or receiver.